1. Field of the Invention
The present invention relates to a method for testing electronic circuits, and more particularly to a method for localizing time-critical events within a clocked electronic circuit.
2. Description of the Prior Art
A non-pulsed electron probe suitable for acquiring logical states at internal nodes of integrated circuits. During the test of an internal measuring point, the probe is positioned to the measuring point and a test pattern sequence is applied to the inputs of the integrated circuit. Given the use of an electronic probe, the transient time of a measuring signal achieved with the electron probe amounts, for example, to 1 ms. The chronological spacing of two successive test patterns must therefore last a few milliseconds in order to guarantee an accurate evaluation of the signal taken from the internal measuring point of the integrated circuit. Such a known method is only suited for clocked synchronous circuits having a relatively low clock frequency because the chronological spacing of two test patterns given this known method with a non-pulsed electron probe must amount to a few milliseconds. Given such slow operation, no statement is possible regarding the chronological behavior of an electronic circuit having a clock frequency above 1 kHz.
Dynamic events in integrated circuits were previously acquired with a sampling method disclosed in U.S. Pat. No. 4,220,854, fully incorporated herein by this reference. Given such a sampling method, however, a cyclical test pattern sequence which can only have a short length must be employed. The use of a cyclical test pattern sequence of short length, however, is not suitable for testing every electronic circuit, for examplye such is hardly suited for testing a logic circuit having numerous sequential stages.